(New page: Category:ECE270 Category:ECE Category:digital systems Category:Lecture_notes Category:Slecture <center><font size="4"></font> <font size="4">'''[[ECE_270_Digital_Sy...) |
|||
| Line 11: | Line 11: | ||
'''Module 1: Boolean Algebra & CMOS logic structures''' | '''Module 1: Boolean Algebra & CMOS logic structures''' | ||
| − | Objectives and | + | Objectives and Outvomes |
[[slectures|Slectures]] by [[User:Rwayner|Robert Wayner]] | [[slectures|Slectures]] by [[User:Rwayner|Robert Wayner]] | ||
| Line 18: | Line 18: | ||
</center> | </center> | ||
---- | ---- | ||
| − | + | =Learning Outcome= | |
| + | An ability to analyze and design CMOS logic gates | ||
| + | =Learning Objectives= | ||
| + | #convert numbers from one base (radix) to another: 2, 10, 16 | ||
| + | #define a binary variable | ||
| + | #identify the theorems and postulates of switching algebra | ||
| + | #describe the principle of duality | ||
| + | #describe how to form a complement function | ||
| + | #prove the equivalence of two Boolean expressions using perfect induction | ||
| + | #describe the function and utility of basic electronic components (resistors, capacitors, diodes, MOSFETs) | ||
| + | #define the switching threshold of a logic gate and identify the voltage ranges typically associated with a “logic high” and a “logic low” | ||
| + | #define assertion level and describe the difference between a positive logic convention and a negative logic convention | ||
| + | #describe the operation of basic logic gates (NOT, NAND, NOR) constructed using N- and P-channel MOSFETs and draw their circuit diagrams | ||
| + | #define “fighting” among gate outputs wired together and describe its consequence | ||
| + | #define logic gate fan-in and describe the basis for its practical limit | ||
| + | #identifykeyinformationcontainedinalogicdevicedatasheet | ||
| + | #calculate the DC noise immunity margin of a logic circuit and describe the consequence of an insufficient margin | ||
| + | #describe the consequences of a “non-ideal” voltage applied to a logic gate input | ||
| + | #describehowunused(“spare”)CMOSinputsshouldbeterminated | ||
| + | #describe the relationship between logic gate output voltage swing and current sourcing/sinking capability | ||
| + | #describe the difference between “DC loads” and “CMOS loads” | ||
| + | CONTINUE | ||
---- | ---- | ||
Revision as of 05:08, 23 July 2013
The Brown-Meyer Lectures on Digital Systems
Module 1: Boolean Algebra & CMOS logic structures
Objectives and Outvomes
© 2013
Learning Outcome
An ability to analyze and design CMOS logic gates
Learning Objectives
- convert numbers from one base (radix) to another: 2, 10, 16
- define a binary variable
- identify the theorems and postulates of switching algebra
- describe the principle of duality
- describe how to form a complement function
- prove the equivalence of two Boolean expressions using perfect induction
- describe the function and utility of basic electronic components (resistors, capacitors, diodes, MOSFETs)
- define the switching threshold of a logic gate and identify the voltage ranges typically associated with a “logic high” and a “logic low”
- define assertion level and describe the difference between a positive logic convention and a negative logic convention
- describe the operation of basic logic gates (NOT, NAND, NOR) constructed using N- and P-channel MOSFETs and draw their circuit diagrams
- define “fighting” among gate outputs wired together and describe its consequence
- define logic gate fan-in and describe the basis for its practical limit
- identifykeyinformationcontainedinalogicdevicedatasheet
- calculate the DC noise immunity margin of a logic circuit and describe the consequence of an insufficient margin
- describe the consequences of a “non-ideal” voltage applied to a logic gate input
- describehowunused(“spare”)CMOSinputsshouldbeterminated
- describe the relationship between logic gate output voltage swing and current sourcing/sinking capability
- describe the difference between “DC loads” and “CMOS loads”
CONTINUE
