The Meyer Lectures on Digital Systems
Module 2: Combinational Logic Circuits
Objectives and Outcomes
© 2013
Learning Outcome
an ability to analyze and design combinational logic circuits
Learning Objectives
- identify minterms (product terms) and maxterms (sum terms)
- list the standard forms for expressing a logic function and give an example of each: sum-of-products (SoP), product-of-sums (PoS), ON set, OFF set
- analyze the functional behavior of a logic circuit by constructing a truth table that lists the relationship between input variable combinations and the output variable
- transform a logic circuit from one set of symbols to another through graphical application of DeMorgan’s Law
- realize a combinational function directly using basic gates (NOT, AND, OR, NAND, NOR)
- draw a Karnaugh Map (“K-map”) for a 2-, 3-, 4-, or 5-variable logic function
- list the assumptions underlying function minimization
- identify the prime implicants, essential prime implicants, and non-essential prime implicants of a function depicted on a K-map
- use a K-map to minimize a logic function (including those that are incompletely specified) and express it in either minimal SoP or PoS form
- use a K-map to convert a function from one standard form to another
- calculate and compare the cost (based on the total number of gate inputs plus the number of gate outputs) of minimal SoP and PoS realizations of a given function
- realize a function depicted on a K-map as a two-level NAND circuit, two-level NOR circuit, or as an opendrain NAND/wired-AND circuit
- define and identify static-0, static-1, and dynamic hazards
- describe how a static hazard can be eliminated by including consensus terms
- describe a circuit that takes advantage of the existence of hazards and analyze its behavior
- draw a timing chart that depicts the input-output relationship of a combinational circuit
- identify properties of XOR/XNOR functions
- simplify an otherwise non-minimizable function by expressing it in terms of XOR/XNOR operators
- describe the genesis of programmable logic devices
- list the differences between complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs) and describe the basic organization of each
- list the basic features and capabilities of a hardware description language (HDL)
- list the structural components of an ABEL program
- identify operators and keywords used to create ABEL programs
- write equations using ABEL syntax
- define functional behavior using the truth_table operator in ABEL
- define the function of a decoder and describe how it can be use as a combinational logic building block
- illustrate how a decoder can be used to realize an arbitrary Boolean function
- define the function of an encoder and describe how it can be use as a combinational logic building block
- discuss why the inputs of an encoder typically need to be prioritized
- define the function of a multiplexer and describe how it can be use as a combinational logic building block
- illustrate how a multiplexer can be used to realize an arbitrary Boolean function